![]() PIXEL OF ROIC MULTIMODE WITH LASER TELEMETRY CAPACITY (LRF)
专利摘要:
The invention relates to a multimode pixel of a pixel array. The multimode pixel includes a photodetector, an image detection circuit having a first plurality of transistors, and a laser distance circuit (LRF) having a second plurality of transistors. At least one transistor of the second plurality of transistors, but not all of the second plurality of transistors, is included in the first plurality of transistors. The LRF circuit is configured to perform LRF operations and the image detection circuit is configured to perform passive imaging operations. The image detection circuit and the LRF circuit are configured to operate simultaneously. 公开号:FR3072465A1 申请号:FR1859553 申请日:2018-10-16 公开日:2019-04-19 发明作者:John Liobe;Joshua Lund 申请人:Sensors Unlimited Inc; IPC主号:
专利说明:
MULTIMODE ROIC PIXEL WITH LASER RANGE CAPACITY (LRF) BACKGROUND OF THE INVENTION 1. Field of the invention The present invention relates to a focal plane array, and more particularly to a pixel of an integrated reading circuit endowed with a laser telemetry capacity. 2. Description of the related prior art There is increased interest in passive imaging, pulse detection and pulse repetition frequency decoding systems, as well as laser telemetry. Systems requiring several sensors pose problems of integration into an optical sensor or a single focal plane array for questions of size and complexity. Multifunctional pixels can be provided in integrated read circuits (ROIC). ROIC with multifunctional pixels can be provided in a focal plane array (FPA) with laser telemetry (LRF) capability. LRF refers to telemetry, which means determining the distance of objects and tracking objects (targets) lit by a laser source in a field of vision (FOV) defined by an FPA. LRF techniques can determine the distance to a target by measuring the time of flight (TOF) of a laser pulse from the laser source to a target and then returned to the receiver, which in this case is the FPA. The laser source can be co-located near the FPA. Range and range resolution are the two most important parameters for any LRF system. In an ideal case, the ranges can be measured in kilometers and the accuracy in meters. These two parameters depend on the signal to noise ratio (SNR) and the receiver bandwidth, for example, of the FPA. Traditionally, the circuits of an individual pixel in the FPA have a bandwidth that is too low for the determination of the TOF. However, increasing the bandwidth of ROIC circuits to meet the needs of determining the TOF generally requires additional circuit elements per pixel as well as increased power consumption, these two factors going against the trends of reduce the pixel area and energy consumption. The LRF function can be performed using voltage-based ramps with a known slope (V / s). The initiation of the ramp is synchronized with the emission of laser pulses by the laser source. When a laser pulse reflected by the FPA is received, the corresponding voltage ramp value is recorded and digitized. Using the known ramp slope, the captured ramp value can be converted to time, and subsequently to distance. Using this method, the voltage-based ramp provides a limited analog voltage range. A longer range can be achieved by decreasing the ramp speed at the expense of range resolution. In addition, additional pixel circuits used for implementing the voltage-based ramp technique may affect the performance of different imaging modes and / or increase the size of the pixels. While traditional methods and systems have generally been found satisfactory for the intended purpose, there is still a need in the art for an EPA capable of performing passive imaging simultaneously with the detection of pulses returned by an active light source. (a laser source) at spatial pixel pitch resolutions and with lower EPA power consumption. The present invention provides a solution to this problem. According to one aspect of the invention, a multimode laser telemetry (LRF) pixel of a pixel array is provided. The multimode LRF pixel includes a photodetector, an image detection circuit comprising a first plurality of transistors and an LRF circuit comprising a second plurality of transistors. At least one transistor of the second plurality of transistors, but not all of the second plurality of transistors, is included in the first plurality of transistors. The LRF circuit is configured to perform LRF operations and the image detection circuit is configured to perform passive imaging operations. The image detection circuit and the LRF circuit are configured to operate simultaneously. In embodiments, the LRF circuit has a bandwidth greater than 200 MHz. In embodiments, the LRF circuit has a bandwidth greater than 500 MHz. Additionally, in embodiments, the multimode LRF pixel further includes a pulse detection circuit and a bias conductor. The pulse detection circuit is configured to perform asynchronous laser pulse detection (ALPD). When a bias signal having a first bias level is applied to the bias conductor, the multimode LRF pixel operates at a first bandwidth which allows the LRF circuit to perform LRF operations. When a polarization signal having a second polarization level lower than the first polarization level is applied to the polarization conductor, the multimode LRF pixel operates at a second bandwidth which does not allow the LRF circuit to perform LRF operations, but which allows the laser pulse detection circuit to perform ALPD operations. In embodiments, the LRF circuit is coupled to at least one comparator to compare the output of the LRF circuit. Each comparator coupled to the LRF circuit is external to the multimode LRF pixel. In addition, in embodiments, the multimode LRF pixel further includes a pulse detection circuit configured to perform asynchronous laser pulse detection (ALPD) operations, a first path connected to the image detection circuit. , a second path connected to the pulse detection circuit and a third path connected to the LRF circuit. The first path is configured for synchronous reading and the second and third paths are configured for asynchronous reading. According to other aspects of the invention, a focal plane array (FPA) is provided, which includes a multimode LRF pixel array. In embodiments, the FPA further includes an active pixel array, in which the multimode LRF pixel array is an appropriate subset of the active pixel array. Additionally, in embodiments, the pixels of the multimode LRF pixel array perform LRF operations at at least a predetermined resolution, in which pixels of the active pixel array that are not included in the multimode LRF pixel array have ) do not include the LRF circuit or include the LRF circuit but are unable to perform LRF operations at at least the predetermined resolution and b) include at least one of an image detection circuit configured to perform operations passive imaging and a laser pulse detection circuit configured to perform ALPD operations. In embodiments, the pixels in the active pixel array that are not included in the multimode LRF pixel array include the LRF circuit. A polarization signal is applied to each of the pixels in the array of active pixels, the polarization signal comprising a first or a second level of polarization. The level of the bias signal determines whether the pixel is included in the multimode LRF pixel array. Active array pixels that receive an applied bias signal having the first level of bias are included in the multimode LRF pixel array. Active array pixels that receive an applied bias signal having the second level of bias are not included in the multimode LRF pixel array. Additionally, in embodiments, the FPA further includes at least one control circuit which receives an input control signal and controls the level of polarization of the polarization signal applied to each of the pixels in the active pixel array. In embodiments, the control signal is based on user input. In addition, in embodiments, the pixels of the active pixel array are structurally uniform. *. According to other aspects of the invention, an LRF apparatus is described which includes a laser source and an FPA which includes a multimode laser telemetry pixel (LRF) pixel array. In embodiments, the multimode LRF apparatus includes an array of active pixels, in which the multimode LRF pixel array is an appropriate subset of the array of active pixels. The pixels of the multimode LRF pixel array perform LRF operations at at least a predetermined time resolution, in which pixels of the active pixel array which are not included in the multimode LRF pixel array a) include the LRF circuit but are incapable perform LRF operations at at least the predetermined time resolution and b) include at least one of an image detection circuit configured to perform passive imaging operations and a laser pulse detection circuit configured to perform ALPD operations. A polarization signal is applied to each of the pixels in the array of active pixels, in which the polarization signal has a first or a second level of polarization. The level of the polarization signal determines whether the pixel is included in the multimode LRF pixel array. The active array pixels which receive an applied polarization signal including the first level of polarization are included in the multimode LRF pixel array. Active array pixels that receive an applied bias signal having the second level of bias are not included in the multimode LRF pixel array. BRIEF DESCRIPTION OF THE DRAWINGS So that the person skilled in the art to which the invention relates can easily understand how to make and use the devices and methods of the present invention without unnecessary experimentation, embodiments of these will be described in detail below with reference to certain figures, in which: FIGS. 1 to 3 each represent a schematic diagram of illustrative embodiments of a multimode laser telemetry pixel (LRF) for the multimode detection of image and / or of reflected laser signals according to embodiments of the present invention; FIG. 4 represents a schematic diagram of an example of a pixel array which includes two multimode LRF pixels, a polarized pixel to activate the LRF function and a polarized pixel not to activate the LRF function according to embodiments of the present invention ; FIG. 5 represents a schematic diagram of an exemplary focal plane array (FPA) comprising pixel sub-arrays according to embodiments of the present invention; FIG. 5A represents a schematic diagram of a multimode pixel which is not provided with LRF capacities according to embodiments of the present invention; FIG. 5B shows a schematic diagram of an example control circuit for an FPA according to embodiments of the present invention; FIG. 6 is a schematic diagram of another embodiment of an example of a multimode LRF pixel according to embodiments of the present invention; and FIG. 7 is a schematic diagram of an example of a TOF receiver circuit of a part of an integrated read circuit (ROIC). DETAILED DESCRIPTION Reference will now be made to the drawings in which identical reference numbers identify similar features or structural aspects of the present invention. For purposes of explanation and illustration, and not limitation, a schematic diagram of an illustrative embodiment of an example of a multimode LRF pixel for multimode detection according to the invention is shown in Figure 1 and is generally designated by the reference character 100. Other embodiments of a multimode LRF pixel according to the invention, or aspects thereof, are provided in Figures 2 to 7, as described. As described in more detail below, the multimode LRF pixel 100 is included in a multimode focal plane array (FPA) which has multimode capabilities for both laser telemetry (LRF) and imaging. Each multimode LRF 100 pixel has LRF capabilities, which means that the pixel is capable of receiving a short duration photocurrent pulse (between nanoseconds and tens of nanoseconds) at its input and providing a response in voltage at its output within 10 ns of the input pulsed photocurrent event. An example of a multimode FPA application is a camera used for infrared imaging and laser telemetry associated with laser pulses emitted by military laser markers and reflected by targets, such as near infrared (NIR) and l short wavelength infrared (SWIR). Other applications for cameras which acquire images and carry out telemetry for short duration high frequency light pulses are also envisaged. LRF techniques can determine the distance to a target by measuring the time of flight (TOF) of a laser pulse from a laser source to the target and then returned to a photodetector. Laser signals from the laser source can have a visible wavelength in the shortwave infrared band. While light travels at a speed of one foot per nanosecond, a TOF resolution of one foot requires a time resolution of 2 nanoseconds, given the round trip. An LRF circuit requires a high time resolution to detect and time stamp the reflected laser pulses with a useful TOF resolution. On the contrary, passive imaging performed by the SWIR camera is a slower process. The output of the photodetector is integrated over time to achieve a desired signal-to-noise ratio, which defines a practical speed at which the image signals wish to be read. As a result, the imaging time resolution may be less than the time resolution required for the TOF laser pulse determination. Accordingly, the multimode LRF pixel 100 can be included in a pixel array of a camera which is used to acquire images and detect laser designation signals to perform LRF operations. The camera can be, for example, a SWIR camera which can be used to detect and time stamp the arrival time of reflected laser signals, which generally have a visible wavelength in the shortwave infrared band. Alternatively, the multimode LRF pixel 100 can also be used to detect and time stamp reflected laser pulses of a non-SWIR wavelength or emitted by other high frequency pulse energy emitters with pulse durations short. The multimode LRF pixel 100 can be used in a sensor array that detects visible, ultraviolet electromagnetic signals or other received electromagnetic signals, such as x-rays. In the embodiment represented in FIG. 1, the multimode LRF pixel 100 includes a photodetector circuit 102. The photodetector circuit 102 can include a photodetector 110 with which is associated an integrated depletion capacity, represented by a parasitic capacitor 112. The capacitor 112 can also represent a capacitance associated with an electrode connecting an anode of the photodetector 110 to a node 141, in which the term "node" designates an electrical node. The term "electrical node" or "node" means any point on a circuit where two or more circuit elements meet, which may include interconnections (eg, wires, tracks) connected directly to this point before encountering a other circuit element. The photodetector 110 is a TIR sensitive detection device which emits a photocurrent in response to excitation by photons in IR wavelengths. Infrared sensitive materials may include, for example, indium antimonide (InSb, pronounced "Inns-Bee"), indium gallium arsenide (InGaAs, pronounced "Inn-Gas"). Alternatively, the photodetector circuit 102 could represent any type of detector generating current in response to an input signal form having sufficient bandwidth to convert an input signal into current for input signal pulses with a duration between 1 ns and 1000 ns. The photodetector circuit 102 detects the incident light which, in the present example, includes ambient infrared light and the reflected laser pulses. In response to detection of infrared light, the photodetector circuit 102 can emit low frequency signals, while in response to detection of reflected laser pulses, the photodetector circuit 102 can emit short durations of high frequency signals. The output of the photodetector circuit 102 is received and processed by an LRF circuit 104 and an image detection circuit 106. The imaging circuit 106, comprising a first plurality of transistors, is configured to perform passive imaging operations. The first plurality of transistors includes, for example, transistors included in an input buffer 120, a controller 122 and transistors included in a current integration circuit 124, wherein the input buffer 120 and the controller 122 can form a feedback circuit. The current integration circuit 124 can be any circuit integrating a signal load to generate an output voltage level. In its most basic implementation, the current integration circuit 124 can be a capacitor. Another exemplary embodiment of the current integration circuit 124 may include a capacitor and a current mirror. The output of the current integration circuit 124 can be directed to a switching circuit which controls the supply of the output of the integration circuit 124 to a synchronous read circuit. The LRF circuit 104, comprising a second plurality of transistors, is configured to perform LRF operations intended to detect asynchronous reflected laser pulses. / In order to detect the reflected laser pulses which operate at high time frequencies, it is necessary to increase the bandwidth of the input buffer 120, which is achieved by increasing the bias current of the input buffer 120. The bias current of the input buffer 120 is increased using a higher bias voltage. The second plurality of transistors includes, for example, transistors included in the input buffer 120 and an amplifier transistor 130. The amplification transistor 130 is a transistor of minimum (or almost minimum) size which can provide the output of the multimode LRF pixel 100 to an input / output terminal of a voltage mode detection amplifier (SA) with a output for the LRF circuit 104. The amplification transistor 130 can be a PMOS or NMOS transistor. Examples of circuits for processing the output of amplification transistors 130 from an LRF pixel array are described in the co-pending American patent application entitled PIXEL OUTPUT PROCESSING CIRCUIT WITH LASER RANGE CAPABILITY (LRF), filed at the same time as this patent application and which is incorporated here in its entirety. A second voltage reference Vref2 is applied to a first terminal of the source / drain terminals of the amplification transistor 130, and an output signal LRF_common of the multimode LRF pixel 100 is output via the other terminal of the source / drain terminals of the amplification transistor 130. The configuration of the terminal used among the source / drain terminals for the application of Vref2 and the output of LRF ... comnion depends on the configuration of the amplification transistor 130 , for example if the amplification transistor 130 is configured as a PMOS or NMOS transistor. In embodiments, one or more sense amplifiers may receive the output of LRF circuits 104 included in an FPA network, such as a subnetwork that includes an appropriate subset of pixels included in the FPA. VDI..RiCj represents an internal voltage at an LRF pixel which experiences a voltage delta in response to a short-lived photocurrent pulse at the pixel input. VREF2 represents a bias voltage supply applied to the source of the amplification transistor 106. The difference between the voltages VDI_RiCj in steady state and VREF2 affects the amplification characteristics of the amplification transistors, as well as the response time of a delta on VDI_RiCj to an indication of pulse indicator at the output terminal 122. Consequently, the LRF circuit 104 and the image detection circuit 106 share one or more transistors, such as transistors included in the input buffer 120. In other words, at least one transistor of the second plurality of transistors, but not all of the second plurality of transistors, is included in the first plurality of transistors. In addition, the LRF circuit 104 and the image detection circuit 106 are configured to perform their respective functions simultaneously, which means that the LRF operations and the passive imaging operation can be performed at the same time. In particular, during the operation of the multimode circuit 100, the high frequency signals follow a high frequency path and gravitate towards a node 140 and the low frequency signals follow a low frequency path and gravitate towards a node 142. The high frequency signals are transmitted by via a node 146 by the amplification transistor 130 as an LRF output signal, LRF_common, which can be processed to determine a time of flight between a transmitted pulse signal and a detected reflected signal. The low frequency signals are received by the current integration circuit 124 to generate image signals which can be processed to be read and displayed. An example of a pixel comprising a high frequency path and a low frequency path is described in US patent application No. 14,997,171 bearing publication No. 2017/0207262, which is incorporated herein by reference in its entirety. The present invention is not limited to a particular configuration for forming the high frequency and low frequency path. By way of example, the input buffer 120, which is represented in the exemplary embodiment in the form of an operational amplifier, receives the charge signal emitted by the photodetector circuit 102 at its input terminal 128. A reference voltage Vrefl is supplied to a reference terminal (positive) 126 of the input buffer 120. The input buffer 120 isolates the photodetector circuit 102 from a load of the LRF circuit 104 and further amplifies the signal coming from of the photodetector circuit 102. Initially, the impedance of the control device 122 is high enough for almost all of the signal charges to drift towards the input terminal 128 of the input buffer 120 because the input impedance at the input terminal 128 is lower than that of the control device 122. These signals accumulated at the input buffer 120 tend to exit the input buffer 120 along the high frequency path e towards node 140. The signals which circulate in the control device 122 are indicated by Vin. The low frequency signals will be transmitted through the controller 122 because the bandwidth of the feedback circuit is sufficient to adjust the impedance of the controller 122 in response to changes in the low frequency signal. In effect, this allows the high frequency signals, indicated by Vdi, to immediately follow the high frequency path to node 140, while the low frequency signals are diverted through the controller 122. As a result, high frequency signals which correspond to high frequency laser pulses having short durations of the order of nanoseconds (for example, 1 to 10 nsec / pulse) and tens of nanoseconds will rapidly propagate towards node 140. As time passes, all charge signals from the photodetector circuit 102, including the low frequency and high frequency signals, can pass through the controller 122 via a charge signal path which traverses the node 144, entering the source node of the controller 122 and leaving its drain node to the low frequency path to node 142 for processing by the current integration circuit 124. This allows low imaging signals frequencies that are captured at a slower speed (for example, 30 ms per frame) out of the controller 122 and into the current integration circuit 124. The input buffer 120 is a pass filter intrinsic low. The input buffer 120 can be an amplifier including NMOS or PMOS transistors and has an RC output, in which R is defined by the output resistance of the input buffer 120 and C is defined by the sum of the physical or parasitic capacities at the output node of the input buffer 120. The output of the input buffer 120 which propagates towards the door of the controller 122 evolves over time to include lower frequency signals which polarize the controller 122 to mainly transmit low frequency signals from the load entering the control device 122 from the output of the photodetector circuit 102, allowing high frequency signals from the load to accumulate at the input terminal 128 of the input buffer 120. The current of the high frequency signal is blocked by the impedance of the control device 122 and is integrated at the input of the photodetector 110 to become a voltage delta at the input terminal 128 of the input buffer 120, which causes the presence of 'a high frequency signal amplified at the output of the input buffer 120. The charge integrated from the high frequency signal is retained and will eventually cross the available control signal 122 through the low frequency path through node 142, but it has already been filtered in the low pass filter and its high frequency content is lost. The control device 122 may include a direct injection transistor which receives the charge signal from the photodetector circuit 102. In the embodiment shown, the direct injection transistor is a p-type MOSFET, in other words a PMOS transistor. The controller 122 receives the charge from the photodetector circuit 102 at its source node. The load can pass through the control device 122 and exit from its door node towards the low frequency signal path only when the control device 122 is sufficiently polarized by the output of the input buffer 120 propagating towards the door of the device 122. At the beginning of the signal incidence, the controller 122 is maintained at a high input impedance, which allows time for the high frequency signals to appear on the high frequency path to the node 140. After the appearance high frequency signals on the high frequency path, the control device 122 is therefore sufficiently polarized from the variable signal on the high frequency path, thus allowing the incident signals to leave the path of the low frequency signal as time s' flows. In the embodiment represented in FIG. 1, the LRF circuit 104 is arranged at the level of the node 140. In embodiments, the LRF circuit 104 can be arranged at the level of another node, such as the node 144, through which more signals pass. However, the components of the LRF circuit 104 can adversely affect the performance of the current integration circuit 124. In addition, the high frequency signals passing through the node 144 have a relatively low amplitude and are more difficult to discern compared to the high frequency signals which cross node 140. Positioning the LRF circuit at node 140 rather than at node 144 has advantages, since node 140 receives high frequency signals which propagate over the high frequency path without disturbing the operation of the current integration circuit 124. In addition, the signals passing through node 140 have been amplified by the open loop gain of the input buffer 120, which is advantageous for the detection of reflected laser pulses. With reference to FIG. 2, a schematic diagram of an embodiment of an example of a multimode LRF pixel 200 is shown. The description of components of the multimode LRF pixel 200 identical to those of the multimode LRF pixel 100 represented in FIG. 1, as indicated by their reference numbers, is not repeated, unless they have a specific relation to the embodiment shown in Figure 2. The multimode LRF pixel 200 further includes a pulse detection circuit 202. The pulse detection circuit 202 may include, for example, a filter and a buffer. The filter may further include an amplification device for amplifying the output of the buffer in order to provide a signal suitable for reading by a reading circuit controlled by a periodic frame synchronization signal. The filter can be a high pass filter or a band pass filter which is set to pass high frequency components through and attenuate noise with lower frequency content from this signal, thereby increasing the signal to noise ratio and the sensitivity of the pulse detection circuit 202 to high frequency inputs to the multimode LRF pixel 300. Since the input buffer 120 functions as an intrinsic low-pass filter, when the filter of the pulse detection circuit 202 is integrated in the form of a high-pass filter, the combination of the input buffer 120 and the filter of the pulse detection circuit 202 forms a band-pass filter. The filter of the pulse detection circuit can be, for example, an RC filter having a capacitor (not shown) and a resistor (not shown). The output of the buffer from the pulse detection circuit (or from the amplification device, if applicable) can be controlled by a switching circuit for the controlled supply to a synchronous read circuit. The amplification device can be, for example, an operational amplifier formed of transistors. In embodiments, the LRF circuit 104 can operate simultaneously with both the imaging circuit 102 and the pulse detection circuit 202 or with either of the imaging circuit 102 and the circuit pulse detection 202. In embodiments, the image detection circuit 106 and the pulse detection circuit 202 can share one or more electrical devices (e.g., amplifier, buffer, transistor, resistor and / or capacitor ). In other embodiments, the image detection circuit 106 and the pulse detection circuit 202 are independent of each other and do not share any electrical devices. Consequently, the multimode LRF pixel 200 includes three different paths leaving the pixel, namely a first path connected to node 142 for passive imaging, current integration and synchronized reading by image frame, a second path connected to node 140 for pulse detection with a synchronized reading by pulse frame and a third path connected to node 140 (or to node 308 as shown in FIG. 3) for asynchronous transmission and LRF processing. The first and second paths are both synchronous to their respective frame and pulse frame synchronization signals, in which the frame and pulse frame synchronization signals can be asynchronous to each other. to the other. While the pulse detection circuit 202 performs an ALPD, this refers to the detection of asynchronous laser pulses with respect to the pulse frame synchronization signals. The reading from the pulse detection circuit 202 is however synchronized with the pulse frame synchronization signals. The third path provides both asynchronous LRF processing and transmission and does not use a frame synchronization signal for reading. Activity along the third path is initiated by the detection of an impulse event in the pixel. Once a pulse event is detected, there is no synchronization signal to initiate a data read activity. Instead, an asynchronous LRF_common signal that indicates when a pulse event was detected is transmitted from the pixel. Outside the pixel, the LRF_common signal is processed asynchronously, without using a synchronization signal, by a first part of a TOF receiver circuit. The first part of the TOF receiver circuit can, for example, compare the LRF_common to a threshold signal or combine, for example, at a common network, the LRF_common signal emitted by the pixel with LRF_common signals emitted by other pixels of the pixel array, such as, for comparison, to a threshold signal and / or application of an OR function (for example, using one or more comparators, OR circuits (or equivalent), amplifier (s) or the like). Thus, the first part of the TOF receiver circuit can verify the detection of a pulse event by any of the pixels in the array. In a second part of the TOF receiver circuit, this is the moment at which the detection of the impulse event by the first part can be recorded, for example, by a counter lock, and compared with a reference time for determining the relative time difference between an initial emission of a laser pulse by the laser source and a verified detection of the reflected laser pulse. With reference to FIG. 3, a schematic diagram of an embodiment of an example of a multimode LRF pixel 300 is shown. The description of components of the multimode LRF pixel 300 identical to those of the multimode LRF pixels 100 and 200 represented in FIGS. 1 and 2, as indicated by their reference numbers, is not repeated, unless they have so specific to a relationship with the embodiment shown in Figure 3. The multimode LRF pixel 300 further includes a high pass filter 302 disposed in the high frequency path to node 240. The high pass filter 302 may include, for example , a transistor 304 and a capacitor 306. The amplification transistor 130 of the LRF circuit 104 is connected to the node 308, because the signals passing through the node 308 are filtered by the high-pass filter 302. A frequency response of the high pass filter 302 is controlled by a first bias Vbp applied to the gate of transistor 304 and Vthres applied to a source or drain terminal of transistor 304. In the example shown, transistor 304 is a transistor NMOS and Vthres is applied to its drain terminal. In embodiments, transistor 304 is a PMOS transistor and Vthres is applied to its source terminal. Vthres is also used to control a bias of the amplifier transistor 130 very close to its threshold. As shown in the example of Figure 3, the amplifier transistor 130 is a PMOS transistor, however, in embodiments, the amplifier transistor 130 may be an NMOS transistor. The node 140, upstream with respect to the high-pass filter 302, is capable of containing a content of low frequency spurious signal, which can mask a reflected high frequency laser signal and prevent its detection. By connecting the amplifier transistor 130 to node 308, the advantages of connection to node 140 rather than to node 144 are obtained, with the additional advantage of eliminating the content of low frequency spurious signal. With reference to FIG. 4, a schematic diagram of an embodiment of part of an example of an array of pixels 400 is shown, including a first pixel LRF 400a and a second pixel 400b. Current polarization is applied to each of the pixels 400a, 400b, as indicated by the contact 402 of the pixels 400a, 400b. A polarization signal is applied via a polarization conductor 404 to each pixel 400a, 400b at the input 204 of the input buffer 120. The polarization signal applied to each pixel 400a, 400b can be configured by a user, a device or a circuit, for example via an activation control circuit LRF 406 which controls the current level of the signal applied to the input buffer 120 of each pixel 400a, 400b. The LRF activation control circuit 406 selects a bias signal to be applied to the input buffer 120 to activate or deactivate a given pixel for TOF operation. The polarization signal can be, for example, lbias_LRF or Ibias „LP. The input signal in the control circuit 406 can be received, for example, from a control circuit (for example, the FPA control circuit 510 shown in Figures 5 and 5B), an analog device, a logic circuit, a digital processing device coupled to pixels 400a, 400b. In embodiments, the LRF 406 activation control circuit can be operated by the user and receive the input signal from a user interface of pixels 400a, 400b. In the example shown, the pixels 400a and 400b both include LRF circuits. A Ibias „LRF polarization signal applied to the LRF 400a pixel has sufficient voltage to bias the LRF circuits to perform LRF operations so that the LRF 400a pixel functions as a multimode pixel capable of performing both LRF and imaging. However, a bias signal Ibias „LP which has a voltage lower than the voltage of the bias signal Ibias_LRF (causing a bias current lower than the bias current caused by Ibias_LRF to be used in the input buffer 120) is applied at pixel 400b. The voltage of the bias signal Ibias_LP is insufficient for the LRF circuits to perform LRF operations or to carry out a TOF operation, but it is sufficient for the current integration circuit 124 to perform signal integration by the circuit current integration 124. Although not shown, pixels 400a and / or 400b may include pixel detection circuits, such as the pixel detection circuit 202 shown in Figure 2 for pulse detection. The pulse detection performed by the pixel detection circuit 202 does not require as much energy as that required to perform LRF operations. The polarization Ibias_LP applied to pixel 400b, although insufficient for the LRF circuits to perform LRF operations, is sufficient for the pulse detection circuit 202 to perform pulse detection operations. As a result, the input buffer 120 of pixel 400b can only be used for imaging or pulse detection or for detection of both imaging and pulse while the lbias_LP polarization is applied to the buffer input 120. As lbias_LP generates a bias current lower than Ibias ... LRF, the pixel 400b consumes less energy than the pixel 400a. With reference to FIG. 5, a schematic diagram of an example of FPA 500 is shown, comprising a pixel array which includes a first sub-array of pixels active in LRF 502 mode; a second subnetwork of pixels active in non-LRF 504 mode, in which the second subnetwork includes the first subnetwork. An array of active pixels 512 therefore includes the pixels active in LRF mode and in non-LRF mode 502, 504. A control circuit FPA 510 is coupled to the active pixels 504 to select the polarization applied to the pixels in LRF mode and to the pixels in non-LRF mode. The pixels active in LRF mode 502 are pixels which operate in LRF mode, because polarization signals which are applied to their respective input buffers, such as the input buffer 120 shown in FIG. 1, supply sufficient current to perform LRF operations. Pixels active in non-LRF 504 mode do not work in LRF mode because the bias signals applied to their respective input buffers do not provide enough current to perform LRF operations. In embodiments, the pixels active in LRF 502 mode have architectures different from those of the pixels active in non-LRF 504 mode. The pixels active in LRF 502 mode can have the architecture of the multimode LRF pixel 100 shown in the figure 1. FIG. 5A represents a schematic diagram of an example of pixel in non-LRF 550 mode. It is a comparison of a pixel in non-LRF 550 mode with a multimode LRF pixel 100 represented in FIG. 1 , which functions as a pixel in LRF 502 mode when a sufficient bias signal is applied, such as Ibias_LRF. First, a pixel in non-LRF mode 550 does not include the amplifier transistor 130 of the multimode LRF pixel 100. Second, a pixel in non-LRF mode 550 can have an input buffer 552 which has a reduced capacity for manage a higher bias current compared to the input buffer 120 of the multimode LRF pixel 100 (for example, a pixel in LRF mode 502). Although the ability of the input buffer 120 to handle the higher bias current compared to the capacity of the input buffer 552 has the advantage of the ability to amplify higher frequency signal content, the buffer input 120 may require more space and consume more power than input buffer 552. The pixel in non-LRF mode 550 can be a multimode pixel which includes the current integration circuit 124 and the pulse detection circuit 202 with the Ibias_LP 404 applied to the input buffer 120. Due to the potential reduction of the input buffer size of pixel 550 compared to multimode LRF pixel 100, as well as the reduced number of components (for example, omission of amplifier transistor 130 and possible omission of one among the current integration circuit 124 or the pulse detection circuit 202), the pixel in non-LRF mode 550 may require a smaller surface, consume less energy and dissipate less heat compared to the LRF pixel multimode 100. In some embodiments, the pixels active in LRF 502 mode and the pixels active in non-LRF 504 mode can have the same architecture, while it is the polarization selected to be applied to the pixels which determines whether the pixels are pixels active in LRF 502 mode or pixels active in non-LRF 504 mode. For example, the ibias LRF polarization signal is applied to pixels in LRF mode, which allows these pixels to operate in LR mode F. The lower voltage bias signal Ibias „LP, which is insufficient to operate in LRF mode, is applied to the active pixels in non-LRF mode 504, which causes these pixels to operate in non-LRF mode. In addition, when operating in non-LRF mode, power consumption and heat dissipation are reduced compared to those of pixels active in LRF 502 mode. However, the architecture being the same for the pixels active in LRF 502 mode and the pixels active in non-LRF 504 mode, the pixels active in LRF 502 mode and the pixels active in non-LRF 504 mode have the same surface area and occupy the same amount of space in the FILA 500. Although the footprint of the active pixels in non-LRF 504 mode cannot be reduced in these embodiments, a uniform pixel architecture within the active pixel array 512 can be advantageous. Thus, in order to maintain energy consumption and minimize heat dissipation, the size of the active pixel sub-array in LRF 502 mode can be reduced as much as possible. In these embodiments, the bias signal applied to the different pixels of the active pixel array 512 can be selected to configure the size and position of the active pixel sub-array in LRF 502 mode through the FPA control circuit. 510. The size and positioning of the active pixel sub-array in LRF 502 mode can be determined based on several factors, such as pixel pitch, pixel sensitivity, pixel bandwidth, and laser source energy . In embodiments, based on the expected reflected laser point size and the energy of a planned use case, the subnet of pixels active in LRF 502 mode may be an 8 × 8 pixel LRF multimode array 100 , without limitation to a particular size. In addition, the sub-array of active pixels in LRF mode 502 can be arranged in the center of the array of active pixels 512, without limitation to this arrangement. With reference to Figure 5B, a schematic diagram is provided. It represents an example of an FPA 510 control circuit receiving an input signal, for example from an analog device, a logic circuit or a digital processing device coupled to the FPA 500. In embodiments, the FPA 510 control circuit can be used by the user and receive the input signal from a user interface of the FPA 500. The FPA 510 control circuit can provide input to the LRF 406 activation control circuit which selects the polarization signal to be applied to the input buffer (for example, the input buffer 120 shown in FIG. 2) of the pixels in LRF 502 mode and of the pixels in non-LRF 504 mode. With reference to FIG. 6, a schematic diagram of an embodiment of an example of a multimode LRF pixel 600 is shown. The description of components of the multimode LRF pixel 600 identical to those of the multimode LRF pixels 100, 200 and 300 represented in FIGS. 1, 2 and 3, as indicated by their reference numbers, is not repeated, except if they are specifically related to the embodiment shown in Figure 6. The multimode LRF pixel 600 further includes an amplifier 602 coupled between the node 140 and the amplifier transistor 130. The amplifier 602 provides a second stage amplification after a first amplification stage provided by the input buffer 120. The amplifier 602 can be a single-ended amplifier or a differential amplifier, and can be inverted or not inverted. In embodiments, the multimode LRF pixel 600 can also include a detection circuit, such as the pulse detection circuit 202 represented in FIG. 2 (in addition to or in place of the integration circuit 124), and / or a high-pass filter, such as the high-pass filter 302 shown in FIG. 3. With reference to FIG. 7, a schematic diagram is shown by way of example of a TOF 700 receiver circuit of a part of a ROIC. The TOF receiver circuit 700 shown includes the amplification transistors 130 of a network of pixels active in LRF mode (such as pixels active in LRF mode 502 of the first sub-network shown in FIG. 5). In the example shown, the array of pixels active in LRF mode is an 8 × 8 array comprising lines R0 to R7 and columns C0 to C7. However, the size of the network is not limited to the example shown. This figure represents VDI_RiCj applied to the amplifier transistor 130 of a pixel active in corresponding LRF mode of the network in line i and column j, 0 <i, j <7) of the network. In the example shown, the signals LRF_.common_.RiCj (0 <i, j <7) emitted by the pixels active in LRF mode of each column of the sub-network are received at a common network 706. Each network common 706 is represented by bold lines, where bold graphics are used, for illustrative purposes, to represent interconnections (for example, wires or tracks) that are electrically connected and form the common network, rather than '' indicate a structural difference from other interconnections. Each common network 706 includes the interconnections which are commonly connected between the circuit elements shown. The common network 706 of each column is also coupled to a bias / reset transistor 712. Each bias / reset transistor 712 is intended to provide a steady current bias to the associated common network 706 to which it is coupled or to reset periodically. the associated common network 706 in preparation for an LRF signal detection operation. At any time, if one or more LRF__common_Cj signals sent to the common network 106 of one of the columns Cj are HIGH, the signal LRF_.common_.Cj transmitted along this column is HIGH, otherwise the signal is LOW. At any time, one or more VDI_RiCj signals may experience a voltage delta in response to a photocurrent pulse in one or more of the LRF pixels. The voltage delta on one or more VDI_RiCj signals will act, via the amplification transistor 10, to generate a voltage delta on the associated common network LRF_.common_.Cj 106. The LRF_common_Cj column signals can be further processed by the downstream LRF circuit to detect an arrival time and generate a time stamp. In the example shown, the bias transistor 124 is shown, connecting to each common column network 106. The bias transistor 124 is used to supply a current or a weak bias charge, supplementing an amplifier formed by the transistors. amplification 10 and the bias transistor 124. Alternatively or additionally, the bias transistor 124 can be used digitally and serve as a reset device. In this configuration, the gate of the VBIAS_Cj bias transistors would be pulsed before the expected arrival of a pulsed laser event, resetting the common networks 106 to a known reset voltage. A first part of the TOF 700 receiver circuit which processes LRF_common_RiCj asynchronously includes comparators 702 and an OR device 720. The comparator 702 is supplied for each column 0 to 7. A reference signal VREF is supplied by means of a reference line 710 to a reference terminal 704 of each of the comparators 702. The common network 706 for each column j, j = 0 to 7, is supplied to an input terminal 708 of the comparator 702 designated for this column. Comparator 702 is external to each of the active pixels in LRF mode. The output of each comparator 702 is connected by a respective comparator output line 722 to the OR device 720, in which the OR device, like the comparators 702, is located outside the active pixels in LRF mode. If all or part of the comparators 702 are triggered to emit a HIGH signal, the comparator 702 emits a pulse indicator signal via an output line OR 724. The TOF 700 receiver circuit is not limited to a particular configuration. For example, a comparator can be used for each active pixel in LRF mode, for several columns of the active pixel sub-array in LRF mode, for one or more rows of the active pixel sub-array in LRF mode. In embodiments, the TOF 700 receiver read circuit may include one or more sense amplifiers. The receiver read circuit 700 has one of the following advantageous characteristics: in embodiments, the LRF signals "common_RiCj are transmitted directly by the corresponding amplification transistors 130 and processed outside the active pixels in LRF mode, by for example by one or more comparators 702, one or more detection amplifiers, or one or more OR devices 720 or equivalent circuits. In this way, the number and size of the components added to the active pixels in LRF mode in order to provide improved capacity in LRF mode are reduced as much as possible. For example, the difference between a pixel that can operate in LRF mode and a pixel that cannot can be the amplifier transistor 130, and the level of the bias signal sent to the input buffer 120, for example by the through a bias conductor, such as a bias conductor 404 shown in Figure 4. In a second part of the TOF 700 receiver circuit, the pulse indicator signal emitted via the output line OU 724 can be synchronized with the transmission of the initial laser pulse emitted by a laser source to a target. (or vice versa) in order to determine a time of flight of the laser pulse reflected by the target and a distance relative to the target. This synchronization can be achieved, for example, by a laser source 740 transmitting a counter reset to a counter 750 of the receiver read circuit 700 of an FPA at a known time relative to the time at which the laser source 740 emits an initial laser pulse to a target. The counter 150 will then increase and then count in response to a counter clock. The laser source 740 can be collocated with the FPA or can be located in a fixed position relative to the FPA so that a known flight time offset could be applied. Upon receipt of the counter reset, counter 750 begins to count. Furthermore, once a pulse indicator signal is generated by the receiver read circuit 700 (for example, issued by the OR device 720), the current counter value is locked in a counter lock 730 . Counter lock 730 can be, for example, a register or memory item that locks (i.e. stores) the counter value and can be read by a processing device or a user for further processing . This locked counter value represents the time between the transmission of the initial laser pulse to a target transmission and the detection of the laser pulse reflected by the target. The locked counter value can thus be used to determine a distance from the target. The counter 750 can operate freely or can be reset after each reading of the counter lock 730. In the first case, the synchronization between the receiver read circuit 700 and the laser source must be maintained, for example by locking the counter value each time the laser source emits an initial laser pulse to a target. The active pixel in FPA mode described can thus be supplied in a sub-network of an FPA. In embodiments, the active pixel in FPA mode can be uniformly configured with active pixels in non-FPA mode, in which the operation of active pixels in FPA mode or in non-FPA mode can be controlled by signals polarization applied to their input buffers to operate in FPA or non-FPA mode. The bias signals can be controlled by a user through a user interface or a device, such as an analog device, a logic circuit, or a digital processing device coupled to the FPA. Using only the active pixels selected in FPA mode saves energy and minimizes heat dissipation. In some embodiments, the pixels active in FPA mode can be configured differently from pixels in non-FPA mode, so as to conserve the space occupied in the FPA. Pixels that can operate in FPA mode are supplied with a small number of components to achieve FPA mode capability. These components include a bias conductor to bias the input buffer, a drop transistor to transmit the output of a high frequency signal traveling a high frequency path, and an output line to output LRF_common signals from the transistor. drop for processing external to the active pixel in FPA mode. None, some or all of these components can be provided in active pixels in non-FPA mode. The components used to process the signals emitted by the active pixels in FPA mode of the FPA are external to these pixels, which reduces the pixel size and height as possible and optimizes the resolution of the FPA. Furthermore, the processing of LRF_common signals involves comparing the LRF_common signals to a reference signal, so that when the LRF_common signal of any of the pixels active in LRF mode is sufficiently different from the reference signal, a pulse is generated . The binary or digital nature of the pulse can be processed without the need to find a compromise between range and resolution of the FPA or its pixels. Without this trade-off, range limits are simply a result of the FPA signal-to-noise ratio (SNR), and resolution limitations are simply a result of FPA bandwidth, SNR ratio, and counter clock jitter. The methods and systems of the present invention, described above and shown in the drawings, provide multimode LRF pixels which allow independent reading of image signals and pulse data. Although the apparatus and methods of the present invention have been shown and described with reference to embodiments, those skilled in the art will readily understand that changes and / or modifications may be made thereto without departing from the spirit and scope of the invention.
权利要求:
Claims (15) [1" id="c-fr-0001] 1. Pixel LRF multimode of a pixel array, comprising: a photodetector; an image detection circuit comprising a first plurality of transistors, the image detection circuit being configured to perform passive imaging operations; and a laser telemetry circuit (LRF) having a second plurality of transistors, at least one transistor of the second plurality of transistors, but not all of the second plurality of transistors, being included in the first plurality of transistors, the LRF being configured to perform LRF operations; wherein the image detection circuit and the LRF circuit are configured to operate simultaneously. [2" id="c-fr-0002] 2. A multimode LRF pixel according to claim 1, in which the LRF circuit has a bandwidth greater than 200 MHz, and preferably greater than 500 MHz. [3" id="c-fr-0003] 3. Pixel LRF multimode according to claim 1, further comprising: a pulse detection circuit configured to perform asynchronous laser pulse detection (ALPD) operations; and a polarization conductor, in which: when a polarization signal comprising a first polarization level is applied to the polarization conductor, the multimode LRF pixel operates at a first bandwidth which allows the LRF circuit to perform LRF operations, and when a polarization signal comprising a second polarization level different from the first polarization level is applied to the polarization conductor, the multimode LRF pixel operates at a second passband which does not allow the LRF circuit to perform LRF operations, but which allows the detection circuit to laser pulse to perform ALPD and passive imaging operations. [4" id="c-fr-0004] 4. Pixel LRF multimode according to claim 1, in which the LRF circuit is coupled to at least one comparator to compare the output of the LRF circuit and each comparator coupled to the LRF circuit is external to the pixel LRF multimode, or a single transistor of the second plurality of transistors is not included in the first plurality of transistors. [5" id="c-fr-0005] 5. Pixel LRF multimode according to claim 1, further comprising: a pulse detection circuit configured to perform asynchronous laser pulse detection (ALPD) operations; a first path connected to the image detection circuit; a second path connected to the pulse detection circuit, the first and second paths being configured for synchronized reading by a frame synchronization signal and a pulse synchronization signal, respectively; and a third path connected to the LRF circuit, the third path being configured for asynchronous transmission. [6" id="c-fr-0006] 6. Focal plane array (FPA) comprising a multimode array of laser telemetry (LRF) pixels, each multimode LRF pixel comprising; a photodetector; an image detection circuit comprising a first plurality of transistors, the image detection circuit being configured to perform passive imaging operations; and a laser telemetry circuit (LRF) having a second plurality of transistors, at least one transistor of the second plurality of transistors, but not all of the second plurality of transistors, being included in the first plurality of transistors, the LRF being configured to perform LRF operations; in which the image detection circuit and the LRF circuit are configured to operate simultaneously. [7" id="c-fr-0007] 7. FPA according to claim 6, in which the LRF circuit has a bandwidth greater than 200 MHz, and preferably greater than 500 MHz. [8" id="c-fr-0008] 8. FPA according to claim 6, in which each multimode LRF pixel further comprises: a pulse detection circuit configured to perform asynchronous laser pulse detection operations (.ALPD); and a polarization conductor, in which: when a polarization signal comprising a first polarization level is applied to the polarization conductor, the multimode LRF pixel operates at a first bandwidth which allows the LRF circuit to perform LRF operations, and when a polarization signal comprising a second polarization level different from the first polarization level is applied to the polarization conductor, the multimode LRF pixel operates at a second bandwidth which does not allow the LRF circuit to perform LRF operations, but which allows the detection circuit to laser pulse to perform ALPD and passive imaging operations. [9" id="c-fr-0009] 9. FPA according to claim 6, in which the LRF circuit is coupled to at least one comparator for comparing the output of the LRF circuit and each comparator coupled to the LRF circuit is external to the multimode LRF pixel, or each multimode LRF pixel further comprises: a pulse detection circuit configured to perform asynchronous laser pulse detection (ALPD) operations; a first path connected to the image detection circuit; a second path connected to the pulse detection circuit, the first and second paths being configured for synchronized reading by a frame synchronization signal and a pulse synchronization signal, respectively; and a third path connected to the LRF circuit, the second and third paths being configured for asynchronous transmission. [10" id="c-fr-0010] The FPA according to claim 6, further comprising an array of active pixels, the multimode LRF pixel array being an appropriate subset of the array of active pixels. [11" id="c-fr-0011] The FPA according to claim 10, wherein the pixels of the multimode LRF pixel array perform LRF operations at at least a predetermined resolution, wherein pixels of the active pixel array which are not included in the multimode LRF pixel array a) do not include the LRF circuit or include the LRF circuit but are unable to perform LRF operations at at least the predetermined resolution and b) include at least one of an image detection circuit configured to perform passive imaging operations and a laser pulse detection circuit configured to perform A LPD operations. [12" id="c-fr-0012] 12. FPA according to claim 11, in which: pixels in the active pixel array which are not included in the multimode LRF pixel array include the LRF circuit, and a bias signal is applied to each of the pixels in the active pixel array, the bias signal comprising a first or a second level of polarization, the level of the polarization signal determining whether the pixel is included in the multimode LRF pixel array, the pixels of the active array receiving an applied polarization signal whose first polarization level is included in the LRF pixel array multimode, the pixels of the active array receiving an applied bias signal whose second level of polarization is not included in the multimode LRF pixel array, and preferably the pixels of the array of active pixels are structurally uniform. [13" id="c-fr-0013] 13. The FPA according to claim 12, further comprising at least one control circuit which receives an input control signal and controls the level of polarization of the polarization signal applied to each of the pixels of the array of active pixels, and preferably the control signal is based on user input. [14" id="c-fr-0014] 14. Multi-mode laser range finding device (LRF), comprising: a laser source; a focal plane array (FPA) comprising a multimode array of laser telemetry pixels (LRF), each multimode LRF pixel comprising: a photodetector; an image detection circuit comprising a first plurality of transistors, the image detection circuit being configured to perform passive imaging operations; and a laser telemetry circuit (LRF) having a second plurality of transistors, at least one transistor of the second plurality of transistors, but not all of the second plurality of transistors, being included in the first plurality of transistors, the LRF being configured to perform LRF operations, wherein the image detection circuit and the LRF circuit are configured to operate simultaneously. [15" id="c-fr-0015] The multimode LRF apparatus according to claim 14, comprising an array of active pixels, the multimode LRF pixel array being an appropriate subset of the active pixel array, wherein the pixels of the multimode LRF pixel array perform LRF operations at at least a predetermined time resolution, in which pixels of the active pixel array which are not included in the multimode LRF pixel array a) include the LRF circuit but are unable to perform LRF operations at at least the temporal resolution predetermined and b) include at least one of an image detection circuit configured to perform passive imaging operations and a laser pulse detection circuit configured to perform ALPD operations, and a bias signal is applied to each of the pixels of the array of active pixels 10, the polarization signal comprising a first or a second level of polarization, the level water of the polarization signal determining whether the pixel is included in the multimode LRF pixel array, the pixels of the active array receiving an applied polarization signal whose first level of polarization is included in the multimode LRF pixel array, the pixels of the array active receiving an applied polarization signal whose second level of polarization is not included in the network 15 of multimode LRF pixels.
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引用文献:
公开号 | 申请日 | 公开日 | 申请人 | 专利标题 US2945915A|1958-01-28|1960-07-19|Strip Joseph|Operational checkout of data handling equipment| JPH08313215A|1995-05-23|1996-11-29|Olympus Optical Co Ltd|Two-dimensional distance sensor| TW589862B|2001-12-11|2004-06-01|Pixart Imaging Inc|Image capturing device and method| WO2004019396A1|2002-08-13|2004-03-04|Tokyo Electron Limited|Plasma processing method and plasma processing device| US7307659B2|2002-12-13|2007-12-11|Freescale Semiconductor, Inc.|Method of fixed pattern noise-reduction and system thereof| US7525586B2|2003-05-12|2009-04-28|Altasens, Inc.|Image sensor and method with multiple scanning modes| US7206251B1|2005-03-08|2007-04-17|Altera Corporation|Dual port PLD embedded memory block to support read-before-write in one clock cycle| KR100697238B1|2005-09-13|2007-03-22|광주과학기술원|Biological early warning system on measuring the water quality toxicity and method therefor| US8059129B2|2006-03-29|2011-11-15|Tektronix, Inc.|Fast rasterizer| JP5055469B2|2006-08-04|2012-10-24|新世代株式会社|Image sensor and image sensor system| KR100886824B1|2006-08-18|2009-03-05|삼성전자주식회사|Touch screen display device including hybrid touch screen panel controller and method thereof| JP4844854B2|2007-09-05|2011-12-28|国立大学法人東北大学|Solid-state imaging device and imaging device| CN101393234B|2007-09-17|2010-09-01|鸿富锦精密工业(深圳)有限公司|Waveform auto-measuring system and method| FR2940463B1|2008-12-23|2012-07-27|Thales Sa|PASSIVE IMAGING SYSTEM EQUIPPED WITH A TELEMETER| WO2011040091A1|2009-09-30|2011-04-07|シャープ株式会社|Display device| US20130162602A1|2010-07-16|2013-06-27|Yousuke Nakagawa|Display device with optical sensor| KR20120138304A|2011-06-14|2012-12-26|삼성전자주식회사|Method of depth image signal processing, depth sensor of the same and image sensing system of the same| US8610046B2|2011-06-16|2013-12-17|Forza Silicon Corporation|Image readout circuit with capacitor that is shared between sample and hold and buffer| US9635287B2|2011-10-11|2017-04-25|Raytheon Company|Method and apparatus for integrated sensor to provide higher resolution, lower frame rate and lower resolution, higher frame rate imagery simultaneously| US9285422B2|2012-05-07|2016-03-15|Freescale Semiconductor Inc.|Tester and method for testing a strip of devices| US8922544B2|2012-05-23|2014-12-30|Ignis Innovation Inc.|Display systems with compensation for line propagation delay| US9916653B2|2012-06-27|2018-03-13|Kla-Tenor Corporation|Detection of defects embedded in noise for inspection in semiconductor manufacturing| JP5740534B2|2012-09-11|2015-06-24|シャープ株式会社|Signal processing system, touch panel controller, and touch panel system and electronic device using the same| US8854475B2|2013-02-08|2014-10-07|Omnivision Technologies, Inc.|System and method for sensor failure detection| US9244560B2|2013-04-15|2016-01-26|Stmicroelectronics Asia Pacific Pte Ltd|Multiple row receiving line pattern for in-cell touchscreen panels| KR102104332B1|2013-07-16|2020-04-27|삼성디스플레이 주식회사|Error detecting apparatus of gate driver, display apparatus having the same and method of detecting error of gate driver using the same| US9591238B2|2014-08-22|2017-03-07|Voxtel, Inc.|Asynchronous readout array| US9641781B2|2015-03-30|2017-05-02|Hamilton Sundstrand Corporation|Imaging circuit including frame asynchronous pulse detection| US9948880B2|2016-08-02|2018-04-17|Sensors Unlimited, Inc.|Asynchronous multimode focal plane array|US11272156B2|2019-02-15|2022-03-08|Analog Devices International Unlimited Company|Spatial correlation sampling in time-of-flight imaging| US20210227158A1|2020-01-22|2021-07-22|Raytheon Company|Imager with integrated asynchoronous laser pulse detection|
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2019-09-19| PLFP| Fee payment|Year of fee payment: 2 | 2020-07-17| PLSC| Search report ready|Effective date: 20200717 | 2020-09-17| PLFP| Fee payment|Year of fee payment: 3 | 2021-09-22| PLFP| Fee payment|Year of fee payment: 4 |
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申请号 | 申请日 | 专利标题 US15785072|2017-10-16| US15/785,072|US10520589B2|2017-10-16|2017-10-16|Multimode ROIC pixel with laser range findingcapability| 相关专利
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